1. Field of the Invention
This invention relates generally to hard disk controllers and, more particularly, the invention relates to a disk controller and associated methods that enable multiple write operations to be executed out of order during a single revolution of a disk.
2. Description of the Related Art
The speed at which a hard disk drive executes read and write operations requested by a host computer is critical to the performance of the computer. Any delay caused by the hard disk drive will likely cause a corresponding delay in the execution of a program by the computer. Some of the developments in hard drive technology have focused on decreasing the response time or increasing the data transfer rate for individual disk operations. Other developments in hard drive technology have focused on decreasing the amount of time that it takes to execute multiple operations. Two of the latter type of developments are described in U.S. Pat. Nos. 4,667,286 and 6,029,226.
U.S. Pat. No. 4,667,286, titled xe2x80x9cMethod and apparatus for transferring data between a disk and a central processing unit,xe2x80x9d presents an architecture with toggling data buffers. The architecture allows multiple operations to be performed during a single revolution of the disk. Data is transferred between the central processing unit and a first data buffer while data is transferred between a second data buffer and the disk. The operation of the buffers can be toggled such that data is transferred between the central processing unit and the second data buffer while data is transferred between the first data buffer and the disk.
U.S. Pat. No. 6,029,226, titled xe2x80x9cMethod and apparatus having automated write data transfer with optional skip by processing two write commands as a single write command,xe2x80x9d presents a method for combining write commands. The proximity of the first logical block address (LBA) of a second write command is compared to the ending LBA of a first write command. If the second write command is sufficiently close, the disk controller executes the two write commands as a single write command, skipping over the sectors between the two commands during the combined write. Two writes, therefore, can be performed in one revolution of the hard disk.
In certain instances, it would also be advantageous to execute write operations in an order other than the order in which the operations are received by the disk controller. Executing write operations out of order may allow the writes to be executed during a single rather than multiple revolutions of the disk. The total time taken to execute the operations is therefore reduced. The present invention seeks to provide this advantage, among others.
In the preferred embodiment, a hard disk unit includes a disk, a controller microprocessor, a host bus interface, a buffer memory, a buffer memory controller, and a disk formatter. Write operations are received by the bus interface, and the corresponding write operation data for each write operation is stored in a circular buffer in the buffer memory. The buffer memory controller implements the circular buffer and controls read and write access to the buffer memory. When write operation data arrives, the buffer memory controller stores the data contiguously within the circular buffer in the relative order in which the operation was received by the hard disk unit.
Upon receiving a command from the microprocessor, in the typical case, the buffer memory controller transfers the data of a write operation from the buffer memory to the disk formatter, which formats the data and writes it to the disk. In one embodiment, the buffer controller will continue transferring data from the circular buffer even after the data of the first write operation has been written to disk. The buffer controller supplies the data, operation by operation, in the order in which it was received by the hard disk unit. The microprocessor can simply issue commands to the disk formatter to continue writing the data of the subsequently received operations.
In the preferred embodiment, the buffer memory controller also includes a set of address registers and a set of block count registers. These registers allow the buffer controller to transfer the data of several operations from the buffer memory in an order other than that in which the commands were received, using only a single command from the microprocessor.
In a preferred method, the microprocessor loads the address registers with the addresses within the buffer memory of the data of two or more write operations. The microprocessor loads the block count registers with the size, in blocks, of the corresponding operations. The microprocessor then issues a single command to the buffer memory controller to transfer the data identified by the address registers and block count registers from the buffer memory to the disk formatter. The buffer controller first transfers the data identified by the first address and block count register, then the second address and block count register, and so on. The address registers and block count registers enable the buffer memory controller to access the data of the write operations from the circular buffer in any order, regardless of the order in which the data is placed in the buffer.
The microprocessor is typically not fast enough to issue a second or additional commands to the buffer controller in time to supply the data for a second or additional operations without losing a revolution of the disk in the meantime. Typically, by the time the microprocessor sets up the buffer memory controller and issues the additional command, the sector to be written has passed the write head and a revolution of the disk is lost. In accordance with the preferred embodiment, however, two or more write operations to the same track may be completed during a single revolution of the disk, even if the operations are received in an order other than the order in which they must be written to the disk.